Toshiba GR-200-5 Instruction Manual

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6F2T0207 (0.01)GRE200 (5,6)- 584 -Table 4.4-1 Names of operators used in the Interlock-check formulaeInterlockoperatorSign ofinterlockoperatorDescription‡Example ofinterlockformula†AND(•)If both input signals are “1”, the resultantoutput signal is “1”. If not, the output signalis “0”.Q1 • Q2OR(+)If either input signals is “1”, the resultantoutput signal is “1”. If not, the output signalis “0”.Q1 + Q2NOT(!) If the input signal is “1”, the resultant outputsignal is “0”. If not, the output signal is “1”. !(Q1)COMPTwo input signals are compared. If the inputsignals are identical, the output signal is “1”.If not, the output signal is “0”.(Q1) COMP (1)†Note: Q1 and Q2 represent controllable objects.‡Note: For further information, see Chapter 4.4.3(iii).4.4.3 Interlock-check method(i) Node and input/output signalsA node is represented by an interlock-operator, input signals (stVal and Quality), and outputsignals (stVal and Quality). For example, Figure 4.4-3 shows a node with an “OR” interlock-operator, input signals, and an output signal. When stVal and ‘Quality’ are applied to theinputs of the node, the resultant output signal is in accordance with the operation rule of “OR”.(For details, see 4.4.3(iii)-2)OR (+)NodestValQualitystValInput(A)Input(B)OutputQualitystValQualityFigure 4.4-3 Input/output signalsNote: A bold line reflects a signal “stVal”. A thin line reflects a signal “Quality”. The usershould note that the signal format generated by control functions should betransposed for the stVal format, as shown in Table 4.4-7.