6F2S1931 (0.20)Centralized GRB200(Soft: 030, 031, 032, 033, 034)- 286 -signal monitoring points of the binary output circuits. The user can monitor the operations ofthe binary output circuit using element ID together with function ID. When we assume thatBIO5A module is at IO#2 slot in the IED case, and if the user wishes to monitor the first-circuitin the BIO5A module, the user can see the operation using the element ID (8002001112) andthe function ID† of IO#2 slot.†Note: A function ID identifies every IO slots. For example, with regard to the functionID and the Data ID at IO#1 slot, see section 4.4.9(i). On the other hand, for IO#2slot see section 4.4.9(ii).(i) CPL switchWhen the user needs to operate the CPL for binary output circuit #1, the user should set Onfor the scheme switch [BO1_CPL]. Conversely, the user should set Off for the scheme switch[BO1_CPL] if CPL is not required. Since all binary output circuits have CPLs setting betweenOn and Off is required for every binary output circuit. The number of CPL is equal to thenumber of binary output circuits: that is, the number of CPLs is 9 in BIO5. Note that thesubsequent PLC settings described later require that Off be set for the scheme switch.(ii) Selection of input signalsSince a binary input circuit is operated by commands introduced from other functions, eightports for input signals are provided, designated asinput-signal1 toinput-signal8. The usermust ensure thatinput-signal1 toinput-signal8 are configured with eight DataIDs. That is,the user can select input-signals that are available from other functions, these input-signalsare designated using DataIDs. The user can key the DataIDs into settings [Input signal1] to[Input signal8]. The DataIDs are selected from theSignal monitoring point list, which isprovided for every function.(iii) Logic gate switchA binary input circuit has a logic scheme for the eight input signals, and can combine the eightinput signals as required using scheme switch [LOGIC-SW] for which the user should set eitherAND, OR or XOR.(iv) Delayed pick-up/delayed drop-off signalAn on-delay timer and an off-delay timer are provided in the CPL; both are used to adjust thetiming for binary output circuits, the user should set their respective time values for settings[On Delay Timer] and [Off Delay Timer].(v) Logic level inversionThe logic inversion function can invert the input signal for each binary output circuit; the user