S3F84B8_UM_REV 1.00 4 CONTROL REGISTERS4-294.1.29 PWMCON — PWM CONTROL REGISTER: EFH, BANK0Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0RESET Value 0 0 0 0 0 0 0 0Read/Write R/W R/W R/W R/W R/W R/W R/W R/WPWM Input Clock Select Bits0 0 fOSC /640 1 fOSC /81 0 fOSC /2.7–.61 1 fOSC /1PWM Output Polarity Select Bit0 Non-inverting output.51 Inverting outputPWM Counter Clear Bit0 No effect..41 Clears the PWM counter (when write).PWM Counter Enable Bit0 Stops counter..31 Starts counter (unlock operation).Anti-Mis-Trigger Enable Bit0 Disables anti-mis-trigger function..21 Enables anti-mis-trigger function.PWM Overflow Interrupt Enable Bit0 Disables interrupt..11 Enables interrupt.PWM Overflow Interrupt Pending Bit0 No interrupt is pending; clears pending bit (when write)..01 Interrupt is pending; no effect (when write).NOTE: To use anti-mis-trigger function, you must enable the linkage of CMP0 and PWM by setting PWMCCON.0 = 1.
