S3F84B8_UM_REV 1.00 6 INSTRUCTION SET6-136.3.1 ADC — ADD WITH CARRYADC dst,srcOperation: dst dst + src + cThe source operand, along with the carry flag, is added to the destination operand. The sum isstored in the destination. Contents of the source remain unaffected. Two’s-complement addition isperformed. In multiple precision arithmetic, this instruction permits the carry from addition of low-order operands into the addition of high-order operands.Flags: C: Set if there is a carry from the most significant bit of the result; cleared otherwise.Z: Set if the result is “0”; cleared otherwise.S: Set if the result is negative; cleared otherwise.V: Set if arithmetic overflow occurs, that is, if both operands are of the same sign and the resultis of the opposite sign; cleared otherwise.D: Always cleared to “0”.H: Set if there is a carry from the most significant bit of the low-order four bits of the result;cleared otherwise.Format:Bytes Cycles Opcode(Hex)Addr Modedst srcopc dst | src 2 4 12 r r6 13 r lropc src dst 3 6 14 R R6 15 R IRopc dst src 3 6 16 R IMExamples: Given R1 = 10H, R2 = 03H, C flag = “1”, register 01H = 20H, register 02H = 03H, and register03H = 0AH:ADC R1,R2 R1 = 14H, R2 = 03HADC R1,@R2 R1 = 1BH, R2 = 03HADC 01H,02H Register 01H = 24H, register 02H = 03HADC 01H,@02H Register 01H = 2BH, register 02H = 03HADC 01H,#11H Register 01H = 32HIn the first example, destination register R1 contains the value 10H, carry flag is set to “1”, andsource working register R2 contains the value 03H. The statement “ADC R1,R2” adds 03H andcarry flag value (“1”) to destination value 10H, leaving 14H in register R1.
