S3F84B8_UM_REV 1.00 4 CONTROL REGISTERS4-54.1.1 ADCON — A/D CONVERTER CONTROL REGISTER: FAH, BANK0Bit Identifier .7 .6 .5 .4 .3 .2 .1 .0RESET Value 0 0 0 0 0 0 0 0Read/Write R/W R/W R/W R/W R/W R/W R/W R/WA/D Converter Input Pin Selection Bits0 0 0 ADC0 (P2.0)0 0 1 ADC1 (P2.1)0 1 0 ADC2 (P2.2)0 1 1 ADC3 (P2.3)1 0 0 ADC4 (P2.4)1 0 1 ADC5 (P2.5)1 1 0 ADC6 (P2.6).7–.51 1 1 ADC7 (P2.7)AD Conversion Completion Interrupt Enable Bit0 Disables ADC Interrupt..41 Enables ADC Interrupt.A/DC Interrupt Pending Bit (EOC)0 No interrupt is pending, conversion is in progress(clears pending bit when write)..31 Interrupt is pending, conversion has completed (no effect when write).Clock Source Selection Bit (Note)0 0 fOSC /8 (fOSC 10MHz)0 1 fOSC /4 (fOSC 10MHz)1 0 fOSC /2 (fOSC 8MHz).2–.11 1 fOSC /1 (fOSC 4MHz)Conversion Start Bit0 No effect.01 Starts A/D conversion.NOTE: Maximum ADC clock input = 4MHz.
