S3F84B8_UM_REV 1.00 5 INTERRUPT STRUCTURE5-175.1.20 PROCEDURE FOR INITIATING FAST INTERRUPTSTo initiate fast interrupt processing, follow these steps:1. Load the start address of the service routine into the instruction pointer (IP).2. Load the interrupt level number (IRQn) into the fast interrupt selection field (SYM.4–SYM.2).3. Write “1” to the fast interrupt enable bit in the SYM register.5.1.21 FAST INTERRUPT SERVICE ROUTINEWhen an interrupt occurs in the level selected for fast interrupt processing, the following events occur:1. The contents of the instruction pointer and the PC are swapped.2. The FLAG register values are written to the FLAGS’ (“FLAGS prime”) register.3. The fast interrupt status bit in the FLAGS register is set.4. The interrupt is serviced.5. Assuming that the fast interrupt status bit is set when the fast interrupt service routine ends, the instructionpointer and PC values are swapped back.6. The content of FLAGS’ (“FLAGS prime”) is copied automatically back to the FLAGS register.7. The fast interrupt status bit in FLAGS is cleared automatically.5.1.22 RELATIONSHIP TO INTERRUPT PENDING BIT TYPESAs described previously, there are two types of interrupt pending bits: One type that is automatically cleared bythe hardware after the interrupt service routine is acknowledged and executed and the other that must be clearedby the application program’s interrupt service routine. You can select fast interrupt processing for interrupts witheither type of pending condition clear function — by the hardware or software.5.1.23 PROGRAMMING GUIDELINESRemember that the only way to enable/disable a fast interrupt is to set/clear the fast interrupt enable bit in theSYM register, SYM.1. Executing an EI or DI instruction globally enables or disables all interrupt processing,including fast interrupts. If you use fast interrupts, remember to load the IP with a new start address when the fastinterrupt service routine ends. For more information, refer to the Figure 6-4, “IRET instruction” in Chapter 6.
