S3F84B8_UM_REV 1.00 2 ADDRESS SPACES2-32.2.1 SMART OPTIONNOTE:1. The unused bits of 3CH, 3DH, 3EH, 3FH must be logic "1".2. When LVR is enabled, LVR level must be set to appropriate value .3. P0.2 has only input (without pull-up) function when sets 003F.2 as 0.4. You must set P0.0,P0.1,P0.2 function on smart option. For example, if you select XIN (P0.0)/XOUT (P0.1)/nRESET(P0.2)function by smart option , you can’t change them to Normal I/O after reset operation.LVR enableor disable bit:0 = Disable1 = EnableLVR level selection101 = 1.9 V110 = 2.3 V100 = 3.0 V001 = 3.6V011 = 3.9 VROM Address: 003FH.7 .6 .5 .4 .3 .2 .1 .0MSB LSBNot usedP0.2/nRESET pinselection bit:0 = P0.2 pin enable1 = nRESETPin enableOscillation selection bit:00 = External crystal (Xin/Xtout pinenable)01 = External RC(Xin/Xtout pin enable )10 = Internal oscillator (0.5MHz)(P0.0,P0.1 are normal IOs)11 = Internal oscilator (8MHz)(P0.0,P0.1 are normal IOs)ROM Address : 003CH.7 .6 .5 .4 .3 .2 .1 .0MSB LSBROM Address: 003DH.7 .6 .5 .4 .3 .2 .1 .0MSB LSBNot usedNot usedROM Address: 003EH.7 .6 .5 .4 .3 .2 .1 .0MSB LSBNot usedFigure 2-2 Smart OptionFor Start condition of the chip, Smart option specifies the ROM option. The ROM address used by Smart option isfrom 003EH to 003FH. Note that 003CH and 003DH are not used in S3F84B8.
