March 2000 © TOSHIBA TEC 7-59 DP120F/DP125F Circuit Description• DMAC GA Signal Table (6/7)No. Signal Name Type Functions142 SPK O Speaker clockOutputs a clock for the artificial ring and tone sig-nals.143-146 DM0-3 - Monitor signal147 ROUTX O Watchdog reset signal (active-low)Detects crashing of the CPU (IC66).149 BUENA O Backup data presence signal (H: Present, L: Absent)Indicates the presence or absence of backup data.150 BUCHG O Backup latch signal (up edge trigger)Holds the presence or absence status of backup data.151 CHRON - Monitor signal152-156 DOP2-7 - Monitor signal158 X32M I System clock input (32.0000MHz)160 PIXRDY I PIX-DRAM ready signalIndicates that the data to be transferred to the PIX-DRAM (IC25) is ready for transfer.161 IPRTA1 I +5V power supply supervisory signalInputs a power supply voltage of +5V through a re-sistor and supervises the voltage.162-167 IPRTA2-7 - Signal ground (Pull down)169 RESETX I Reset signal (active-low)Resets the system.170-172 TST0-2 I Signal ground173 ANSDET2 I Line 2 frequency detect signalDetects the frequency which flows through the con-nection line of the line 2 NCU PBA.174 ANSDET1 I Line 1 frequency detect signalDetects the frequency which flows through the con-nection line of the line 1 NCU PBA.175 INTMD1 I Line 1 MODEM interrupt signal (active-low)The interrupt signal of the MODEM (IC5) is input.(Interrupt level 6)176 MDRRQ1 I Line 1 MODEM receive data transfer request signalThe MODEM makes a request to transfer receivedata.I: Input O: Output I/O: Bidirectional