Chapter 6. Service Request Function336 PACSystems* RX7i, RX3i and RSTi-EP CPU Programmer's Reference Manual GFK-2950C6.33.3 Erase CyclesThe flash component on the PACSystems CPU is rated for 100K erase cycles. Erase cycles occurunder the following conditions:▪ Write to flash is commanded from the programmer.▪ Clear flash operation.▪ Flash compaction after a power cycle when flash memory allotted for SVC_REQ 57 has becomefull.6.33.4 Discrete MemoryDiscrete memory can be written to as individual bits or as bytes. For more information, see Address.Force and transition information is not written to nonvolatile storage.6.33.5 RetentivenessWriting values to nonvolatile storage for non-retentive memory such as %T does not make thememory retentive. For example, all values stored to %T memory are set to zero on power-up or aSTOP Mode to RUN Mode transition. You can, however, read such values from storage after power-up or STOP Mode to RUN Mode transition by using SVC_REQ 56.6.33.6 Maximum of One Active InstructionWhen SVC_REQ 57 is active, it does not support an interrupt that attempts to activate SVC_REQ 56or a second instance of SVC_REQ 57.6.33.7 Storage Disabled ConditionsBy default, the following write operations disable SVC_REQ 57 until logic is written to nonvolatilestorage:▪ RUN Mode Store (RMS), even if a second RMS reverts everything to the original state▪ Test-Edit session, even when you cancel your edits▪ Word-for-word change▪ Downloading to RAM only of a stopped PACSystems CPU, even if the downloaded contents areequal to the contents already on the nonvolatile storageSetting bit 0 of input word 4 (address + 4) to a value of 1 enables SVC_REQ 57 despite the aboveconditions.6.33.8 Error CheckingWhen writing to nonvolatile storage, error checking is provided to ensure that logic and theHardware Configuration (HWC) in nonvolatile memory match the logic and HWC in PACSystemsRAM.
