Chapter 6. Service Request Function332 PACSystems* RX7i, RX3i and RSTi-EP CPU Programmer's Reference Manual GFK-2950C6.32.5 Parameter BlockAddress+0 Memory type. Refer to Memory Type Codes below.Address+1 The zero-based offset N to read from nonvolatile storage. Contains the complete offset for anymemory area except %W, which also requires the use of address + 2 for offsets greaterthan 65,535.▪ For %I, %Q, %M, %T, and %G memory in byte mode, N = (Ra - 1) / 8, where Ra = one-basedreference address. For example, to read from the one-based bit reference address %T33,enter the byte offset 4: (33 - 1) / 8 = 4.▪ For %W, %R, %AI, and %AQ memory, and for %I, %Q, %M, %T, and %G memory in bit mode,N = Ra - 1. For example, to read from the one-based reference address %R200, enter thezero-based reference offset 199; to read from %I73 in bit mode, enter offset 72. Formemory in bit mode, the offset must be set on a byte boundary, that is, a number exactlydivisible by 8: 0, 8, 16, 24, and so on.Address+2Address+3 Length. The number of items to read from nonvolatile storage beginning at the referenceaddress calculated from the offset defined at [address + 1 and address + 2]. The length can beone of the following:Description Valid rangeThe number of words (16-bit registers) to readfrom %W, %R, %AI, or %AQ nonvolatile storage1 through 32 wordsThe number of bytes to read from %I, %Q, %M,%T, or %G in byte mode nonvolatile storage1 through 64 bytesThe number of bits to read from %I, %Q, %M, %T,or %G in bit mode nonvolatile storage1 through 512 bits inincrements of 8 bitsThe value must reside in the low byte of address + 3. The high byte must be set to zero.Address + 4 Destination memory. The CPU memory area to write the read data to. This does not need to bethe same memory area as specified at [address]. Writing to a different memory area enablesyou to compare the values that were already in the CPU with the values read from nonvolatilestorage.Address+5 The zero-based offset N in CPU memory to start writing the read data to. Address + 5, the leastsignificant word, contains the complete offset for any memory area except %W, which alsorequires the use of address + 6 for offsets greater than 65,535.▪ For %I, %Q, %M, %T, and %G memory in byte mode, N = (Ra - 1) / 8, where Ra = one-basedreference address. For example, to write to the one-based bit reference address %T33,enter the byte offset 4: (33 - 1) / 8 = 4.▪ For %W, %R, %AI, and %AQ memory, and for %I, %Q, %M, %T, and %G memory in bit mode,N = Ra - 1. For example, to write to the one-based reference address %R200, enter thezero-based reference offset 199; to write to %I73 in bit mode, enter offset 72.Address+6Address+7 ▪ When bit 0 is set to 1, storage disabled conditions are ignored. A read is allowed even if thelogic in RAM has changed since nonvolatile storage was read or written.▪ Bits 1 through 15 must be set to zero; otherwise, the read fails.Address+8 Reserved. Must be set to zero; otherwise, the read fails.Address+9 Response status. The status read from nonvolatile storage. The low byte contains the majorerror code; the high byte contains the minor error code.For definitions, refer to Response Status Codes for SVC_REQ 56.Address+10 Response Count. The number of words, bytes, or bits copied.
