Chapter 6. Serial I/O, SNP & RTU Protocols232 PACSystems* RX7i, RX3i and RSTi-EP CPU Reference Manual GFK-2222AD6.3.2 Cyclic Redundancy Check (CRC)The CRC is one of the most effective systems for checking errors. The CRC consists of two checkcharacters generated at the transmitter and added at the end of the transmitted data characters. Usingthe same method, the receiver generates its own CRC for the incoming data and compares it to the CRCsent by the transmitter to ensure proper transmission. A complete mathematic derivation for the CRC isnot given in this section. This information can be found in a number of texts on data communications.The essential steps that should be understood in calculating the CRC are as follows:■ The number of bits in the CRC multiplies the data bits that make up the message.■ The resulting product is then divided by the generating polynomial (using modulo 2 with no carries).The CRC is the remainder of this division.■ Disregard the quotient and add the remainder (CRC) to the data bits and transmit the messagewith CRC.■ The receiver then divides the message plus CRC by the generating polynomial and if the remainderis 0, the transmission was transmitted without error.A generating polynomial is expressed algebraically as a string of terms in powers of X such asX3 + X2 + X0 (or 1)which, in turn, can be expressed as the binary number 1101.A generating polynomial could be any length and contain any pattern of 1s and 0s as long as both thetransmitter and receiver use the same value. For optimum error detection, however, certain standardgenerating polynomials have been developed. RTU protocol uses the polynomialX16 + X15 + X2 + 1 which in binary is 1 1000 0000 0000 0101. The CRC this polynomial generates isknown as CRC-16.The discussion above can be implemented in hardware or software. One hardware implementationinvolves constructing a multi-section shift register based on the generating polynomial.Cyclic Redundancy Check Register13 12 11 10 9 8 7 6 5 4 3 2 1 015 14 + + ++ DataInputCRC Register= Exclusive OrX2 X15 X16Figure 51: CRC Register OperationTo generate the CRC, the message data bits are fed to the shift register one at a time. The CRC registercontains a preset value. As each data bit is presented to the shift register, the bits are shifted to the right.The LSB is XORed with the data bit and the result is: XORed with the old contents of bit 1 (the resultplaced in bit 0), XORed with the old contents of bit 14 (and the result placed in bit 13), and finally, it isshifted into bit 15. This process is repeated until all data bits in a message have been processed. Softwareimplementation of the CRC-16 is explained in the section below.
