Chapter 4. CPU Operation174 PACSystems* RX7i, RX3i and RSTi-EP CPU Reference Manual GFK-2222AD4.11 Power-Up and Power-Down Sequences4.11.1 Power-Up SequenceSystem power-up consists of the following parts:▪ Power-up self-test▪ CPU memory validation▪ System configuration▪ Intelligent option module self-test completion▪ Intelligent option module dual port interface tests▪ I/O system initializationPower-Up Self-TestOn system power-up, many modules in the system perform a power-up diagnostic self-test. The CPUmodule executes hardware checks and software validity checks. Intelligent option modules performsetup and verification of on-board microprocessors, software checksum verification, local hardwareverification, and notification to the CPU of self-check completion. Any failed tests are queued forreporting to the CPU during the system configuration portion of the cycle.If a low or failed battery (or Energy Pack fault) indication is present, a fault is logged in the CPU fault table.CPU Memory ValidationThe next phase of system power-up is the validation of the CPU memory. First, if the system verifies thatuser memory areas are still valid. A known area of user memory is checked to determine if data waspreserved. Next, if a ladder diagram program exists, a checksum is calculated across the _MAIN ladderblock. If no ladder diagram program exists, a checksum is calculated across the smallest standalone Cprogram.When the system is sure that the user memory is preserved, a known area of the bit cache area ischecked to determine if the bit cache data was preserved. If this test passes, the Bit Cache memory isleft containing its power-up values. (Non-retentive outputs are cleared on a transition from STOP Modeto RUN Mode.) If the checksum is not valid or the retentive test on the user memory fails, the bit cachememory is assumed to be in error and all areas are cleared. The CPU is now in a cleared state, the sameas if a new CPU module were installed. All logic and configuration files must be stored from theprogrammer to the CPU.System ConfigurationAfter completing its self-test, the CPU performs the system configuration. It first clears all systemdiagnostic bits in the bit cache memory. This prevents faults that were present before power-down butare no longer present from accidentally remaining as faulted. Then it polls each module in the system forcompletion of the corresponding self-test.The CPU reads information from each module, comparing it with the stored (downloaded) rack/slotconfiguration information. Any differences between actual configuration and the stored configurationare logged in the fault tables.
