boards.fmA31003-H3590-S100-7-7620, 06/2012HiPath 3000/5000 V9, Service documentation 3-93Nur für den internen Gebrauch Boards for HiPath 3000Peripheral boardsBGx_0A,BGx_0BX1-02, X1-26X1-06, X1-08X1-10, X2-02X2-04, X2-06X2-08, X2-10X3-02, X3-04X3-06, X3-08X3-10, X4-02Sets 0 to 7 AB pair Not connectedHO0 … HO3 X8-22, X7-30, X8-44,X8-42Old PCM lines (2.048 Mbps) InputHI0 … HI3 X9-24, X9-02, X9-44,X9-42Old PCM lines (2.048 Mbps) OutputWHO0 … WHO3 X6-32, X6-33, X6-34,X6-35New PCM lines (2.048 Mbps) InputWHI0 … WHI3 X7-31, X7-32, X7-33,X7-34New PCM lines (2.048 Mbps) OutputHDI X9-06 HDLC lines InputHDO X8-04 HDLC lines OutputPRS X7-26 System reset InputBA0 … BA6 X7-06, X7-28, X8-26X8-28, X9-04, X8-06,X8-2Frame address recognition InputFMB X9-22 Clock synchronization signal InputCKA X8-08 System clock (2.048 MHz) Input(CLS) X8-10 Clock selection(CLS=GND --> CKA=2.048 MHz)The (CLS) pin should beearthed on the backplane.InputRCLK X7-02 Reference clock OutputRAC X7-04 Reference clock activationLow-active for activating RCLKTristate for deactivating CLKOutput tristateLWLOOP X4-04 Output for result of self-check Not connectedTOUT X6-48 Output for result of self-check Not connectedTCK X7-44 Boundary scan: check clock Not connectedSignal Name Connector contact Signal description DirectionTable 3-36 SIPAC Connector Contact Assignment
