BIT 4886 031912 A-5A.13 *SRE — SERVICE REQUEST ENABLE COMMAND *SRESyntax: *SRE where = value from 0 - 255 per Table A-3, except bit 6 cannot be pro-grammed.Description: Sets the condition of the Service Request Enable register. The Service Request Enable registerdetermines which events of the Status Byte Register are summed into the MSS (Master Status Sum-mary) and RQS (Request for Service) bits. RQS is the service request bit that is cleared by a serialpoll, while MSS is not cleared when read. A “1” (1 = set = enable, 0 = reset = disable) in any ServiceRequest Enable register bit position enables the corresponding Status Byte bit to set the RQS andMSS bits. All the enabled Service Request Enable register bits then are logically ORed to cause Bit 6of the Status Byte Register (MSS/RQS) to be set. Related Commands: *SRE?, *STB?. (See exam-ple, Figure A-1.)A.14 *SRE? — SERVICE REQUEST ENABLE QUERY *SRE?Syntax: *SRE? Response: = value from 0 - 255 per Table A-3.Description: Reads the Service Enable Register. Used to determine which events of the Status Byte Register areprogrammed to cause the power supply to generate a service request (1 = set = function enabled, 0 =reset = function disabled). Related Commands: *SRE, *STB? (See example, Figure A-1.)A.15 *STB? — STATUS BYTE REGISTER QUERY *STB?Syntax: *STB? Response: value from 0 to 255 per Table A-3.Description: Reads Status Byte Register without clearing it. This Query reads the Status Byte Register (bit 6 =MSS) without clearing it (1 = set = function enabled, 0 = reset = function disabled). The register iscleared only when subsequent action clears all set bits. MSS is set when the power supply has oneore more reasons for requesting service. (A serial poll also reads the Status Byte Register, except thatbit 6 = RQS, not MSS; and RQS will be reset.) Related Commands: *SRE, *SRE?. (See example, Fig-ure A-1.)A.16 *TRG — TRIGGER COMMAND *TRGSyntax: *TRGDescription: Triggers the power supply to be commanded to preprogrammed values of output current andvoltage. When the trigger is armed, *TRG generates a trigger signal if TRIG:SOUR is set to BUS andthe WTG bit in Status Operational Condition register (bit 5, Table B-3) is asserted. The trigger is armedby sending a) INIT:CONT ON to continuously arm the trigger and allow subsequent *TRG commandsto generate the trigger signal or b) if INIT:CONT is set to OFF, sending INIT arms the system andallows a *TRG to generate a single trigger. If *TRG is received while the trigger is not armed, the trig-ger is not produced and no error is generated.The trigger will change the output of the power supply to the output voltage and current levels speci-fied by VOLT:TRIG and CURR:TRIG commands and clear the WTG bit in the Status Operation Condi-tion register. If INIT:CONT 1 (ON) has been issued, the trigger subsystem is immediately rearmed forsubsequent triggers, and the WTG bit is again set to 1. *TRG or GET are both addressed commands(only devices selected as listeners will execute the command). If output is set to OFF, *TRG is ignored.Related Commands: ABOR, INIT, TRIG, CURR:TRIG, VOLT:TRIG. (See example, Figure A-1. )TABLE A-3. SERVICE REQUEST ENABLE AND STATUS BYTE REGISTER BITSCONDITION OPER MSSRQS ESB MAV QUES ERRQUELISTRUN BUSYBIT 7 6 5 4 3 2 1 0VALUE 128 64 32 16 8 4 2 1BUSY BusyLIST RUN List is runningOPER Operation Status SummaryMSS Master Status SummaryRQS Request for ServiceESB Event Status Byte summaryMAV Message availableQUES QUEStionable Status SummaryERR QUE 1 or more errors occurred (seePAR. B.132)
