Sharp Blue Treak LH75400 User Manual

Analog-to-Digital Converter/Brownout Detector LH75400/01/10/11 (Preliminary) User’s Guide23-6 6/25/03Figure 23-4 shows an example of a 4-bit conversion. In this figure, the y-axis and the boldline show the DAC output voltage. In this example:1. The first comparison shows that VIN < VDAC. Consequently, bit [3] is set to 0. TheDAC is then set to 01002 and the second comparison is conducted.2. In the second comparison, VIN > VDAC, so bit [2] remains at 1. The DAC is then setto 0110 2 and the third comparison is conducted.3. In the third comparison, bit [1] is set to 0 and the DAC is then set to 01012 forthe last comparison.4. In the final comparison, bit [0] remains at 1 because VIN > VDAC.Four comparison periods are necessary for a 4-bit ADC. Generally, an N-bit SAR ADCrequires N comparison periods and will not be ready for the next conversion until the cur-rent conversion is completed. This explains why the ADC is power- and space-efficient.Another feature of SAR ADCs is that power dissipation scales with the sample rate. Bycomparison, flash or pipelined ADCs usually have constant power dissipation as opposedto sample rate. This SAR ADC feature is especially useful in low-power applications orapplications where data acquisition is not continuous.Figure 23-4. Example of a 4-bit SAR ADC OperationVREF3/4 VREF1/2 VREF1/4 VREFBIT 3 = 0(MSB)BIT 2 = 1 BIT 1 = 0 BIT 0 = 1(LSB)VINTIMEVDACLH754xx-98