Sharp Blue Treak LH75400 User Manual

LH75400/01/10/11 (Preliminary) User’s Guide Liquid Crystal Display Controller6/17/03 14-1714.3.2.9 Raw Interrupt Status RegisterStatus is the Raw Interrupt Status Register. This register is Read/Write.• On a read, this register returns five bits that may generate interrupts when set.• On writes to this register, a bit value of ‘1’ clears the interrupt corresponding to that bit.Writing a ‘0’ has no effect.Table 14-21. Status RegisterBIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16FIELD ///RESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RW R R R R R R R R R R R R R R R RBIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0FIELD ///MBERRORVcompLNBUFUF ///RESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RW R R R R R R R R R R R RC RC RC RC RADDR 0xFFFF4000 + 0x20Table 14-22. Status Register DefinitionsBIT NAME DESCRIPTION31:5 /// Reserved Writing to these bits has no effect. Reading returns 0.4 MBERRORMaster Bus Error Interrupt Asserted when an ERROR response is re-ceived by the master interface during a transaction with a slave. When suchan error is encountered, the master interface enters an error state and re-mains in this state until clearance of the error has been signaled to it.3 VCOMPVertical Compare Interrupt Asserted when one of four vertical display re-gions, selected via the LCD Control Register with bits [13:12], is reached.The interrupt can be made to occur at the start of Vertical Synchronization,Back Porch, Active Video, and Front Porch.2 LNBULCD Next Base Address Update Interrupt Asserted when either theUPBASE or the LPBASE values have been transferred to the UPCURR orLPCURR incrementer, respectively. This indicates to the system that it cansafely update the UPBASE or the LPBASE Register with new frame baseaddresses if required.1 FUFFIFO Underflow Interrupt Asserted when internal data is requested froman empty LCD DMA FIFO. Internally, individual upper and lower panel LCDDMA FIFO Underflow Interrupt signals are generated, and this is the singlecombined version of these.0 /// Reserved Writing to this bit has no effect. Reading returns 0.