Sharp Blue Treak LH75400 User Manual

Controller Area Network LH75400/01/10/11 (Preliminary) User’s Guide22-14 6/17/0322.3.2.6 Bus Timing Register 0BTR0 is one of two CAN Timing Registers (BTR1 is the other). Together, these two regis-ters define the structure of the bit period.The BTR0 Register defines the values of the Synchronization Jump Width (SJW) and theBit Rate Prescaler (BRP). This register can only be written to in Reset Mode. In OperatingMode, it is Read Only.Table 22-12. BTR0 RegisterBIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16FIELD ///RESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RW R R R R R R R R R R R R R R R RBIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0FIELD /// SJW SJW BRP5 BRP4 BRP3 BRP2 BRP1 BRP0RESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RW R R R R R R R R R R R R R R R RADDR 0xFFFC5000 + 0x18Table 22-13. BTR0 Register DefinitionsBITS NAME DESCRIPTION31:8 /// Reserved Writing to these bits has no effect. Reading returns 0.7:6 SJWSynchronization Jump Width Defines the maximum number of clockcycles by which a bit period can be shortened or lengthened in attempt-ing to re-synchronize on the relevant signal edge (recessive to domi-nant) of the current transmission. The number of clock cycles range from0 to 3.5:0 BRP4 - BRP0Bit Rate Prescaler Defines the period (time quantum) of the CANclock tSCL as a multiple of the system clock period. The time quantumof the CAN clock is given by:tSCL =2 × tCLK × ((32 × BRP.5) + (16 × BRP.4) + (8 × BRP.3) +(4 × BRP.2) + (2 × BRP.1) + BRP.0 + 1)where tCLK = time period of the system clock frequency = 1/ƒSYSTEM CLK