Sharp Blue Treak LH75400 User Manual

UART2 LH75400/01/10/11 (Preliminary) User’s Guide20-14 6/17/0320.3.2.5 General Enable RegisterRegister Bank: 0GER is the General Enable Register. The GER Register enables or disables the bits of theGSR Register from being reflected in the GIR Register. GER acts as the Device EnableRegister, masking the interrupt requests from the UART blocks.Table 20-13. GER RegisterBIT 31 30 29 28 27 26 25 24 23 22 21 20 19 18 17 16FIELD ///RESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RW R R R R R R R R R R R R R R R RBIT 15 14 13 12 11 10 9 8 7 6 5 4 3 2 1 0FIELD /// TIE TxIE ///RxIETFIERFIERESET 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0 0RW R R R R R R R R R R RW RW R RW RW RWADDR 0xFFFC2000 + 0x04Table 20-14. GER Register DefinitionsBITS NAME DESCRIPTION31:6 /// Reserved Do not modify. Read as zero.5 TIE Timers Interrupt Enable4 TxIE Transmitter Interrupt Enable3 /// Reserved Read as zero.2 RxIE Receiver Interrupt Enable1 TFIE Transmit FIFO Interrupt Enable0 RFIE Receive FIFO Interrupt Enable