TC9349AFG2006-02-24953. LCD Driver Operation Timingz LCD output waveform in the 1/2 bias mode (BIAS bit= “0”)In the 1/2 bias mode, the potential of the LCD driver waveform is outputted as VLCD and GND and the V EE levelis outputted at a frame frequency of 62.5 Hz.Note: Setting the DISP OFF bit to “L” causes the common output to revert to the VLCD × 1/2 level andturns all the display off.Note: All the common and segment outputs are fixed to the “L” level in the clock stop mode and for100 ms after this is released.DISP OFFCOM1COM2COM3COM4S1S2COM1-S1(ON波形)COM2-S1(OFF波形)2ms 16ms(62.5Hz)VEE(1.5V)VLCD(3V)GND-VLCDVEE(1.5V)VLCD(3V)GNDVEE(1.5V)VLCD(3V)GNDVEE(1.5V)VLCD(3V)GNDVLCD(3V)GNDVLCD(3V)GNDVLCDGND-VLCDVLCDGNDS1S2COM4COM3COM2COM11Y1 Y2 Y4 Y80 1 00(S1)1 1 0 1COM1 COM2 COM3 COM4COM1 COM2 COM3 COM41(S2)セグメントデータ例データセレクト(φL/K1A)、セグメントデータ1(φL13 φL14)Example of segment dataSegment data 1(φL13, φL14)Data select(φL/K1A)COM1-S1(ON waveform)COM2-S1(Off waveform)