Toshiba TC9349AFG Manual

TC9349AFG2006-02-2475z POL bit (Selection of serial clock logic for serial data)Select the logic for shift clock input/output of the serial clock.When "1" is set to the bit of POL and a master setup is selected, serial operation stops on the "H" level in the stateof a stop, if operation starts, the serial clock outputs and it stops on "H" level. When the POL bit is set to “0”, thelogic will be reversed, that is, the operation will start from the “L” level.Together with the output logic, this bit controls the serial counter operation edge by the serial clock input/outputand the serial input take-in edge. The timing operation by the POL bit is as shown below.データ入力の取り込みシリアルクロックシリアル出力シリアル入力シリアル出力カウンタ（～）OTC0 3ビットシリアル入力カウンタ（～）ITC0 3ビット（）２、３（）A 線式マスタ・スレーブ線式スレーブ設定時 POL="1"データ入力の取り込みシリアルクロックシリアル出力シリアル入力シリアル出力カウンタ（～）OTC0 3ビットシリアル入力カウンタ（～）ITC0 3ビット（）２、３（）B 線式マスタ・スレーブ線式スレーブ設定時 POL="0"シリアルクロックシリアル出力シリアル入力シリアル出力カウンタ（～）OTC0 3ビットシリアル入力カウンタ（～）ITC0 3ビット（）３（）C 線式マスター設定時 POL="1"tscktsck/4 tsck/4シリアルクロックシリアル出力シリアル入力シリアル出力カウンタ（～）OTC0 3ビットシリアル入力カウンタ（～）ITC0 3ビット（）３（）D 線式マスター設定時 POL="0"tscktsck/4 tsck/4Note: When the 3-wired master mode is selected, the serial output (serial output counter) changes intiming shifted by tsck/4.Note: When the 2-wired master mode is selected, the serial clock is operated by the input of the SCKpin clock. Therefore, the serial operation will not start if the SCK pin clock does not outputwaveforms for some reason.Note: Set to POL = “0” when UART is selected.Note: This bit is reset to “0” after a system reset.0: Positive logic output (SCK clock is outputted from the “L” level)1: Negative logic (SCK clock is outputted from the “H” level)Selection of serial clock logic for serial data(POL bit)(A) 2-wired master and slave and 3-wired slave modes (POL=”1”)Serial clock(A) 2-wired master and slave and 3-wired slave modes (POL=”1”)Take in data inputSerial outputSerial outputcounter(OTC0 to 3 bit)Serial inputSerial inputcounter(ITC0 to 3 bit)Serial clockTake in data inputSerial outputSerial outputcounter(OTC0 to 3 bit)Serial inputSerial inputcounter(ITC0 to 3 bit)(C) 3-wired master mode (POL=”1”) (D) 3-wired master mode (POL=”0”)Serial clockSerial outputSerial outputcounter(OTC0 to 3 bit)Serial inputSerial inputcounter(ITC0 to 3 bit)Serial clockSerial outputSerial outputcounter(OTC0 to 3 bit)Serial inputSerial inputcounter(ITC0 to 3 bit)