Toshiba TC9349AFG Manual

TC9349AFG2006-02-2444The DAL address register (AR) is a register that specifies the program-memory-indirect when the DALR instruction isexecuted with the 16-bit register.There are two types of commands that load the program memory data: the DAL instruction and the DALR instruction.For the DAL instruction, the contents of the (six-bit) ADDR3 in the operand and of the general register (r) become thereference address of the program memory. For the DALR instruction, the 14 bits of the DAL address register become thereference addresses. When the DAL instruction is executed, the program memory area (0000H ~ 03FFH) becomes thereference area. All the areas in the program memory area can be referred to by executing the DALR instruction. Wheneverthe DALR instruction is executed, the content of the DAL address register is increased by +1. Therefore data can becontinuously loaded.Moreover, the content of the data register can be transmitted to the DAL address register in 14 bits with one instructionby executing the MVAR instruction.The contents of the DAL address register can be accessed in four-bit units on execution of an OUT1/IN1 instruction forwhich [CN = 1H] is specified in the operand. DAL address register port is divided and indirectly specified with the dataselection port (φL1A) and set. The data of the specified port to be set beforehand is set and the data port corresponding to itis accessed. Each time the data select port (φL/K11) is accessed it is increased by +1. Therefore the data can be continuouslyaccessed after setting up a data selection port.Note: The DAL address register is valid only when the DALR instruction is executed, and is ineffective whenany other instruction is executed. Moreover, the DAL address register is unaffected by the DALinstruction.Note: This product has 8 k steps of ROM capacity; if 2000H ~ 3FFFH is specified in the DAL register and theDALR instruction is executed, the contents of the data register will become indeterminate.Note: It is possible to rewrite and reference the contents of the interrupt stack registers ISRd0~ISRd15(φL/K10(C∼F)) through programming.3. Carry flag (φL/K1B)The carry flag is set when either Carry or Borrow occurs in the result of the calculation instruction execution and is resetif neither of these occurs. This carry flag is accessed with an OUT1/IN1 instruction for which [CN = BH] has been specified.The carry flag contains a four-level interrupt stack register. When an interrupt is issued, this bit is evacuated to theinterrupt register specified by the interrupt stack pointer, and is returned with the RNI instruction.φ L/K1B CaY1 Y2 Y4 Y8*/0 */0 */0Carry flagφL/K10(6)Y1 Y2 Y4 Y8*/0 */0ISP1ISP0Interruption stack pointerISRCA */0 */0 */00123At the time of interruptionprocessing executionAt the time of RNIinstruction executionφL/K10(B)Interruption stack registerPageInterrupt stack pointerInterrupt stack registerAt the time of interruptprocessing executionCarry flagPage