Toshiba TC9349AFG Manual

TC9349AFG2006-02-2413Description of Operations{ CPUThe CPU consists of a program counter, a stack register, an ALU, program memory, data memory, a G-register, a dataregister, a DAL address register, a carry flip-flop (F/F), a judge circuit, interrupt stack register and an interrupt circuit.1. Program Counter (PC)The program counter is a 14-bit binary up-counter used to address program memory (ROM). The program counter iscleared by a system reset and starts from address 0.The PC is normally incremented by 1 at the execution of each instruction. However, executing a Jump or Call instructionloads the address specified in the operand of the instruction to the PC.When an instruction with a skip function (the AIS, SLTI, TMT, RNS instructions, etc.) is executed and the result of theinstruction satisfies the skip condition, the PC is incremented by 2 and the next instruction is skipped.When an interrupt is received, the system loads the vector address corresponding to the interrupt.Note: The program memory (ROM) uses the address range 0000H to 1FFFH. Access to addresses outside thisrange is prohibited.Contents of program counter (PC)InstructionPC13 PC12 PC11 PC10 PC9 PC8 PC7 PC6 PC5 PC4 PC3 PC2 PC1 PC0JUMP ADDR1 0CALL ADDR2 0DAL ADDR3, (r)(DAL bit = 0) 0 0 0 0DAL (DA)(DAL bit = 1)RN, RNS, RNIWhen interrupt receivedPower-on reset, reset byRESET pin 0 0 0 0 0 0 0 0 0 0 0 0 0 0Interrupt source Vector addressINTR1 pin 0001HINTR2 pin / Timer port 0002HSerial interface / timer port / decreased voltage detection 0003HTimer counter 0004HDAL address register (AR)Contents of stack registerVector addresses for interruptInstruction operand (ADDR3) Contents of generalregister (r)Instruction operand (ADDR1)Instruction operand (ADDR2)