Toshiba TC9349AFG Manual
TC9349AFG2006-02-2477z STPS bit (Selection of the serial clock counter stop condition)The serial operation stops when it becomes the stop position of a serial counter. There are two types of serialcounters, the serial output counter and the serial input counter. The stop condition is switched between the output andinput counters.(シリアルクロック SCK)シリアル出力カウンタ( ~ )OTC0 3ビット( )2/3 ( 、 )A 線式設定時 POL="0" STP="0"停止シリアル入力カウンタ( ~ )ITC0 3ビット(シリアルクロック SCK)シリアル出力カウンタ( ~ )OTC0 3ビット( )2/3 ( 、 )B 線式設定時 POL="0" STP="1"停止シリアル入力カウンタ( ~ )ITC0 3ビット(シリアルクロック SCK)シリアル出力カウンタ( ~ )OTC0 3ビット( )2/3 ( 、 )C 線式設定時 POL="1" STP="0"停止シリアル入力カウンタ( ~ )ITC0 3ビット(シリアルクロック SCK)シリアル出力カウンタ( ~ )OTC0 3ビット( )2/3 ( 、 )D 線式設定時 POL="1" STP="1"シリアル入力カウンタ( ~ )ITC0 3ビット停止Note: Set to STPS = “1” (Select the clock output counter) as shown in (B) when the 2-wired or UARTmode is selected.Note: This bit is reset to “0” after a system reset.z SWENA bit (Serial wait enable)This control bit is effective only when the 2-wired mode is selected. usually, set this bit to “1” when the 2-wiredmode is selected.If serial wait is enabled in the 2-wired mode, the SCK is outputted at the “L” level and becomes the clock waitstate and the serial clock is suspended when the serial output counter (OCT0~3) becomes “F” (HEX).(シリアルクロック SCK)シリアル出力カウンタ( ~ )OTC0 3ビット2 ( 、 、 )線式設定時 POL="1" STP="0" SWENA="1"、SCK出力は"L"レベルが出力され。一時停止しますF(HEX)Note: Set to SWENA = “0” when the 3-wired or UART mode is selected.Note: This bit is reset to “0” after system reset.Selection of serial clock counter stop condition(STPS bit)0: Select the input clock counter1: Select the output clock counterSerial wait enabling setting (SWENA bit)0: Prohibition1: Enabled (Set to “1” when the 2-wired setting is selected)(A) 2- or 3-wired mode (POL=”0”, STP=”0”)Serial clock (SCK)StopSerial output counter(OTC0 to 3 bit)Serial input counter(ITC0 to 3 bit)Serial clock (SCK)StopSerial output counter(OTC0 to 3 bit)Serial input counter(ITC0 to 3 bit)(B) 2- or 3-wired mode (POL=”0”, STP=”1”)(C) 2- or 3-wired mode (POL=”1”, STP=”0”)Serial clock (SCK)Serial output counter(OTC0 to 3 bit)Serial input counter(ITC0 to 3 bit)Serial clock (SCK)Serial output counter(OTC0 to 3 bit)Serial input counter(ITC0 to 3 bit)(D) 2- or 3-wired mode (POL=”1”, STP=”1”)Stop StopWhen the 2-wired mode is selected (POL=”1”, STP=”0”, SWENA=”1”)Serial clock (SCK)Serial output counter(OTC0 to 3 bit)SCK is outputted at the “L” leveland is suspended |
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