Xilinx M401 User Manual

Xilinx M401 User Manual Manual pdf 9 page image

ML401/ML402/ML403 Evaluation Platform www.xilinx.com 9UG080 (v2.5) May 24, 2006RML401/ML402/ML403 Evaluation PlatformIntroductionThe ML401/ML402/ML403 evaluation platform enables designers to investigate andexperiment with features of the Virtex™-4 family of FPGAs. This user guide describesfeatures and operation of the ML401, ML402, and ML403 (ML40x) evaluation platforms.Features• Virtex-4 FPGA:♦ ML401: XC4VLX25-FF668-10♦ ML402: XC4VSX35-FF668-10♦ ML403: XC4VFX12-FF668-10• 64-MB DDR SDRAM, 32-bit interface running up to 266-MHz data rate• One differential clock input pair and differential clock output pair with SMAconnectors• One 100-MHz clock oscillator (socketed) plus one extra open 3.3V clock oscillatorsocket• General purpose DIP switches (ML401/ML402 platform), LEDs, and push buttons• Expansion header with 32 single-ended I/O, 16 LVDS capable differential pairs,14 spare I/Os shared with buttons and LEDs, power, JTAG chain expansioncapability, and IIC bus expansion• Stereo AC97 audio codec with line-in, line-out, 50-mW headphone, andmicrophone-in (mono) jacks• RS-232 serial port• 16-character x 2-line LCD display• One 4-Kb IIC EEPROM• VGA output:♦ ML401: 50 MHz / 24-bit video DAC♦ ML402: 140 MHz / 24-bit video DAC♦ ML403: 140 MHz / 15-bit video DAC• PS/2 mouse and keyboard connectors• System ACE™ CompactFlash configuration controller with Type I/II CompactFlashconnectorwww.BDTIC.com/XILINX