30 www.xilinx.com ML401/ML402/ML403 Evaluation PlatformUG080 (v2.5) May 24, 2006Detailed Description R29. DONE LEDThe DONE LED indicates the status of the DONE pin on the FPGA. It should be lightedwhen the FPGA is successfully configured.30. Program SwitchThis switch grounds the FPGA's Prog pin when pressed. This action clears the FPGA.31. Configuration Address and Mode DIP SwitchesThis 6-position DIP switch controls the configuration address and FPGA configurationmode.The three leftmost switches choose one of eight possible configuration addresses. Thesethree DIP switches provide the System ACE controller and the CPLD the possibility ofusing up to eight different configuration images as set by these three switches. ThePlatform Flash memory supports up to four different images.The three rightmost DIP switches set the FPGA configuration mode pins M2, M1, and M0as shown in Table 15.32. Encryption Key BatteryAn onboard battery holder is connected to the VBATT pin of the FPGA to hold theencryption key for the FPGA. A 12-mm lithium coin battery (3V), such as Panasonic partnumbers BR1216, CR1216, and BR1225, or any other appropriate 12-mm lithium coinbattery (3V) can be used.33. Configuration Source Selector SwitchThe configuration source selector switch (SW12) selects between System ACE, PlatformFlash, and linear flash/CPLD methods of programming the FPGA. Whichever method isselected to program the FPGA, make sure the FPGA configuration mode switches are setappropriately for the desired method of configuration. The PC4 connector allows JTAGdownload and debug of the board regardless of the setting of the configuration sourceselector switch.Table 15: Configuration Mode DIP Switch SettingsM2 M1 M0 Mode0 0 0 Master Serial1 1 1 Slave Serial0 1 1 Master Parallel (SelectMAP)1 1 0 Slave Parallel (SelectMAP)1 0 1 JTAGwww.BDTIC.com/XILINX