Xilinx M401 User Manual

Xilinx M401 User Manual Manual pdf 19 page image

ML401/ML402/ML403 Evaluation Platform www.xilinx.com 19UG080 (v2.5) May 24, 2006Detailed DescriptionR8. User Push Buttons (Active-High)Five active-High user push buttons are available for general purpose usage and arearranged in a North-East-South-West-Center orientation (only the center one is cited inFigure 2, page 12). Table 7 summarizes the user push button connections.9. CPU Reset Button (Active-Low)The CPU reset button is an active-Low push button intended to be used as a system or userreset button. This button is wired only to an FPGA I/O pin, so it can also be used as ageneral purpose button (see Table 8).Table 7: User Push Button ConnectionsReferenceDesignator Label/Definition FPGA PinSW3 GPIO Switch North E7SW5 GPIO Switch East F10SW4 GPIO Switch South A6SW7 GPIO Switch West E9SW6 GPIO Switch Center B6Table 8: CPU Reset ConnectionsReferenceDesignator Label/Definition FPGA PinSW10 FPGA CPU RESET D6www.BDTIC.com/XILINX