ML605 Hardware User Guide www.xilinx.com 7UG534 (v1.9) February 26, 2019PrefaceAbout This GuideThis manual accompanies the Virtex®-6 FPGA ML605 Evaluation Board and containsinformation about the ML605 hardware and software tools.Guide ContentsThis manual contains the following chapters:• Chapter 1, ML605 Evaluation Board, provides an overview of the embeddeddevelopment board and details the components and features of the ML605 board.• Appendix A, Default Switch and Jumper Settings.• Appendix B, VITA 57.1 FMC LPC (J63) and HPC (J64) Connector Pinout.• Appendix C, Xilinx Design Constraints.• Appendix D, Regulatory and Compliance Information.• Appendix E, References.Additional DocumentationThe following documents are also available for download atwww.xilinx.com/support/documentation/virtex-6.htm.• Virtex-6 Family OverviewThe features and product selection of the Virtex-6 family are outlined in this overview.• Virtex-6 FPGA Data Sheet: DC and Switching CharacteristicsThis data sheet contains the DC and Switching Characteristic specifications for theVirtex-6 family.• Virtex-6 FPGA Packaging and Pinout SpecificationsThis specification includes the tables for device/package combinations and maximumI/Os, pin definitions, pinout tables, pinout diagrams, mechanical drawings, andthermal specifications.• Virtex-6 FPGA Configuration GuideThis all-encompassing configuration guide includes chapters on configurationinterfaces (serial and SelectMAP), bitstream encryption, boundary-scan and JTAGconfiguration, reconfiguration techniques, and readback through the SelectMAP andJTAG interfaces.• Virtex-6 FPGA Clocking Resources User GuideSend Feedback