50 www.xilinx.com ML605 Hardware User GuideUG534 (v1.9) February 26, 2019Chapter 1: ML605 Evaluation BoardFPGA INIT and DONE LEDsThe typical Xilinx FPGA power up and configuration status LEDs are present on theML605.The red INIT LED DS31 comes on momentarily after the FPGA powers up and during itsinternal power-on process. The DONE LED DS13 comes on after the FPGA programmingbitstream has been downloaded and the FPGA successfully configured.17. User I/OThe ML605 provides the following user and general purpose I/O capabilities:• User LEDs (8) with parallel wired GPIO male pin header• User Pushbutton (5) switches with associated direction LEDs• CPU Reset pushbutton switch• User DIP switch (8-pole)• User SMA GPIO• LCD Display (16 char x 2 lines)X-Ref Target - Figure 1-17Figure 1-17: FPGA INIT and DONE LEDsFPGA INIT BNDS336PFPGA_DONEVCC2V5 VCC2V5Q141R4193305%1/16WR427.41%1/16WR327.41%1/16W121212DS31DS133 21 21 2LED-RED-SMTLED-GRN-SMTUG534_17_050510Table 1-20: FPGA INIT and DONE LED ConnectionsFPGA U1 Pin Schematic Net Name Controlled LEDP8 FPGA_INIT_B DS31 INIT, RedR8 FPGA_DONE DS13 DONE, GreenSend Feedback
