Xilinx ML605 Hardware User's Manual

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Xilinx ML605 Hardware User's Manual Manual pdf 29 page image

ML605 Hardware User Guide www.xilinx.com 29UG534 (v1.9) February 26, 2019Detailed Description6. USB JTAGJTAG configuration is provided through onboard USB-to-JTAG configuration logic wherea computer host accesses the ML605 JTAG chain through a Type-A (computer host side) toType-Mini-B (ML605 side) USB cable.The JTAG chain of the board is illustrated in the figure below. JTAG configuration isallowable at any time under any mode pin setting. JTAG initiated configuration takespriority over the mode pin settings.FMC bypass jumpers J17 and J18 must be connected between pins 1-2 (bypass) to enableJTAG access to the FPGA on the basic ML605 board (without FMC expansion modulesinstalled), as shown in Figure 1-5 and Figure 1-6. When either or both VITA 57.1 FMCexpansion connectors are populated with an expansion module that has a JTAG chain, therespective jumper(s) must be set to connect pins 2-3 in order to include the FMC expansionmodule's JTAG chain in the main ML605 JTAG chain.X-Ref Target - Figure 1-4Figure 1-4: JTAG Chain DiagramJ22USB Mini-BFMC HPC FMC LPCTDI TDOJ64TDI TDITDOTDOJ63J17 J18 3.3V 2.5VSystem ACE CF FPGATSTTDI CFGTDOTSTTDO CFGTDIU19 U1UG534_04_081309X-Ref Target - Figure 1-5Figure 1-5: VITA 57.1 FMC HPC (J64) JTAG Bypass Jumper J17X-Ref Target - Figure 1-6Figure 1-6: VITA 57.1 FMC LPC (J63) JTAG Bypass Jumper J18J171FMC_TDI_BUF Bypass FMC HPC J64 = Jumper 1-2Include FMC HPC J64 = Jumper 2-3H - 1x3UG534_05_0813092FMC_LPC_TDI3FMC_HPC_TDOJ181FMC_LPC_TDI Bypass FMC LPC J63 = Jumper 1-2Include FMC LPC J63 = Jumper 2-3H - 1x3UG534_06_0813092SYSACE_TDI3FMC_LPC_TDOSend Feedback