ADLINK Technology NuDAQ PCI-9812/10 User Manual

Contents

ADLINK Technology NuDAQ PCI-9812/10 User Manual Manual pdf 5 page image

Table of Contents • iCONTENTSHow to Use This Guide .......................................... ivChapter 1 Introduction........................................... 11.1 Features.......................................................................... 11.2 Applications.................................................................... 21.3 Specifications ................................................................. 21.4 Software Support............................................................ 41.4.1 Programming Library..................................................................41.4.2 PCIS-LVIEW: LabVIEW ® Driver.................................................41.4.3 PCIS-VEE: HP-VEE Driver..........................................................41.4.4 DAQBenchTM: ActiveX Controls ...............................................51.4.5 DASYLabTM PRO...........................................................................5Chapter 2 Installation ............................................ 62.1 What You Have ............................................................... 72.2 Unpacking....................................................................... 72.3 PCI-9812/10's Layout ...................................................... 82.4 Hardware Installation...................................................... 92.5 Device Installation for Windows Systems....................... 9Chapter 3 Signal Connection ..............................103.1 Connectors................................................................... 103.2 Analog Input Impedance Setting................................... 123.2.1 Analog Input ............................................................................... 123.2.2 External Clock 0......................................................................... 133.2.3 External Clock 1......................................................................... 133.2.4 Digital Input................................................................................. 13Chapter 4 Registers Format................................144.1 I/O Port Address ........................................................... 144.2 ADC Channel Enable Register ...................................... 154.3 ADC Clock Divisor Register.......................................... 164.4 Trigger Mode Register .................................................. 174.5 Trigger Level Register .................................................. 184.6 Trigger Source Register................................................ 194.7 Post Trigger Counter Register...................................... 204.8 FIFO Status Register..................................................... 21