26 • Operation TheoremAfter deciding the A/D siginal source, users must decide how totrigger the A/D conversion and define/control the trigger source. TheA/D converter will start to convert the siginal to a digital value whena trigger condition is met. The PCI-9812/10 provides five triggermodes, please refer to section 5.3The A/D clock is controlled by internal clock or external clock source.The detailed operation of the A/D clock source is described insection 5.4.At the end of an A/D conversion, the A/D data is buffered in a FIFO.The total FIFO size on PCI-9812/10 is 32K samples. This buffersize is relative to the highest data transfer rate. The A/D datashould be transferred into PC’s memory for further processing. ThePCI-9812/10 uses DMA to transfer the A/D data to host memory.Please refer to section 5.5.To process A/D data, programmer should know about the A/D dataformat. Please refer ot section 5.6.5.2 A/D Signal Source ControlTo control the A/D signal source, three concepts should beunderstood, They are signal type, signal channel and signal range.Signal TypeThe A/D siginal sources of PCI-9812/10 are single ended(SE).Numbers of ChannelThere are four channels in SE mode. The channel number iscontrolled by the ADC Channel Enable Register. Please refer tosection 4.2.Signal Range and Input impedanceThe proper signal range is important for data acquisition. Theavailable signal input ranges for 9812/10 are ±5V or ±1V, which areset by soldering the copper pads on the PCB. The input impedancefor high speed applications should also be considered. Theselectable input impedance values are 50 Ohm, 1.25 K, 15M ohm.Please refer to section 3.2 for details.