7 Series FPGAs GTP Transceivers User Guide www.xilinx.com 161UG482 (v1.9) December 19, 2016RX Byte and Word AlignmentFigure 4-26 shows TX parallel data on the left side, and RX receiving recognizable parallel dataafter comma alignment on the right side.Enabling Comma AlignmentTo enable the comma alignment block, the RXCOMMADETEN port is driven High.RXCOMMADETEN is driven Low to bypass the block completely for minimum latency.Configuring Comma PatternsTo set the comma pattern that the block searches for in the incoming data stream, theALIGN_MCOMMA_VALUE, ALIGN_PCOMMA_VALUE, and ALIGN_COMMA_ENABLEattributes are used. The comma lengths depend on RX_DATA_WIDTH (see Table 4-47, page 216).Figure 4-27 shows how the ALIGN_COMMA_ENABLE masks each of the comma values to allowpartial pattern matching.Figure 4-28 shows how the commas are combined when ALIGN_COMMA_DOUBLE is TRUE.X-Ref Target - Figure 4-26Figure 4-26: Parallel Data View of Comma AlignmentTX Parallel Data RX Parallel DataData0CommaData1Data2Non-alignedDataCommaData1Data2TimeUG482_c4_15_110911X-Ref Target - Figure 4-27Figure 4-27: Comma Pattern MaskingX-Ref Target - Figure 4-28Figure 4-28: Extended Comma Pattern Definition0101111100xxx11111000001111111ALIGN_MCOMMA_VALUEorALIGN_PCOMMA_VALUE Pattern Required forComma Detection(x = Don’t Care)ALIGN_COMMA_ENABLE UG482_c4_16_111011ALIGN_MCOMMA_VALUE ALIGN_PCOMMA_VALUEUG482_c4_17_111011Send Feedback
