7 Series FPGAs GTP Transceivers User Guide www.xilinx.com 11UG482 (v1.9) December 19, 2016Chapter 1Transceiver and Tool OverviewOverview and FeaturesThe 7 series FPGAs GTP transceiver is a power-efficient transceiver, supporting line rates between500 Mb/s and 6.6 Gb/s. The GTP transceiver is highly configurable and tightly integrated with theprogrammable logic resources of the FPGA. Table 1-1 summarizes the features by functional groupthat support a wide variety of applications.Table 1-1: 7 Series FPGAs Transceiver FeaturesGroup Feature GTP GTX GTHPCS 2-byte internal datapath x x x4-byte internal datapath x x8B/10B encoding and decoding x x x64B/66B and 64B/67B support x x xComma detection and byte and word alignment x x xPRBS generator and checker x x xFIFO for clock correction and channel bonding x x xProgrammable FPGA logic interface x x xPMA One shared LC tank PLL per Quad x xOne ring oscillator PLL per channel x xTwo shared ring oscillator PLLs per Quad xFlexible reference clocking options x x xDecision feedback equalization (DFE) x xPower-efficient adaptive linear equalizer mode called the low-power mode (LPM) x x xTX Pre-emphasis x x xBeacon signaling for PCI Express® designs x x xOut-of-band (OOB) signaling including COM signal support for Serial ATA (SATA)designs x x xRX Margin Analysis x x xSend Feedback
