OfficeServ 7100 Service Manual© SAMSUNG Electronics Co., Ltd. 2-392.5.11.2 Main FeaturesThe Main Features of the 16DLI board are as follows:QDMC (STI9511)The QDMC(STI9511) is a special ASIC for controlling TP3404, which is the Quad DigitalAdapter for Subscriber Loops(QDASL) chip of National Semiconductor. The TP3404 ismade in the following procedures: The transceiver in a single channel Time CompressionMultiplexed(TCM) transmission method is expanded to 4 ports and micro wired controland other control structures are changed.The functional features of the QDMC are as follows:y Transfers/receives data in a UART format for D channels.y A UART speed(2/4/8/16 kbps) can be selected.y The B channel functions as a by-pass interface.y Inter-works with micro wired serial control(16-bit).y Controls two TP3404 chips.(A total of 16 channels are available.)y Recognizes the used board and ID.y Master clock of 4.096 MHzy Operates at 5 Vy 60 QFPQDASL InterfaceThis interface is a D channel of each port, and RxD and TxD exist for serial data transfer.AMI codes created along with B channels are transmitted to the line and the D-channel dataare used for controlling phones. The B-channel data are used for generating voice signals./INTD processes the micro-channel interrupt of QDASL in each port. The INT of theQDASL is generated only when accessing the micro channel and initializing the QDASL.The INT is generated in the event of NO SIGNAL(CO), OUT OF SYNC(C1), and BIPOLARVIOLATION(C7).The INT is bundled up of UART Tx INT and AND GATE only when power is on for thefirst time and the QDASL status is changed by an error in the phone. The INT is a clock inthe μ-CH controlling part that sets the initial QDASL status of the port and is configuredwith CCLK(1 MHz), CI for entering controlling data, and CO for displaying status.Also, B channel is synchronized into hardware frame allocated to itself and is transmittedto the QDASL by opening the hardware buffer. The control data are transferred to the sub-time slot, which is D-channel where 256 channels of 2-bit are allocated. The sub-time slotmeans that the B channel of 8-bit is divided into four. To receive D channel data of 1 bytefrom the QDASL, the data of 4 frames should be received first.
