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Kantronics KPC–3 Plus User Manual
Also see for KPC-3 Plus: User guideUser guideManual
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218KPC-3 Plus JumpersJumper LocationsTo locate jumpers listed below, use the schematic shipped with the unit and (for locationson the printed circuit board) the parts layout in Appendix E.PrintedSchematic CircuitJumper # Location Location Name .J1 A-6 D-4 battery optionJ2 A-6 D-4 battery optionJ3 D-2 D-1 modem input impedanceJ4 D-2 D-1 equalizationJ5 C-1 D-2 ground/resetJ6 B-1 D-2 reset/inputJ7 B-1 D-2 serial configurationJ8 B-1 D-2 analog input AN0J9 C-1 D-1 normal/HTJ10 B-2 D-2 analog input AN1J11 C-4 C-3 reset jumperJ12 C-3 C-1 PTT watchdogJ13 C-6 C-3 ROM size (KPC3-Plus)J14 C-6 A-3 RAM sizeJ15 D-4 A-1 NAJ16 A-5 B-4 power supplyJ17 full dup (KPC3 Plus MX)J18 full dup (KPC3 Plus MX)J19 full dup (KPC3 Plus MX)J20 full dup (KPC3 Plus MX)J1 and J2: (battery options) These jumpers can be configured several ways. J1 isnormally OFF, and J2 is normally ON. This allows for power from a 9-V battery to beswitched into the circuit when the external power plug is removed. If it is desired to have―backup‖ 9-V battery power in the event of loss of the external power source, J1 shouldbe ON, and J2 should be OFF. In this case the 9-V battery is isolated from the externalpower by CR2 which prevents a higher external voltage from being applied across thebattery.J3: (modem input impedance) this 2-pin jumper, when installed, sets input impedance ofthe modem to 600 Ω. When placed on one pin only, input impedance is set to 10 kΩ.Default is 10 kΩ.J4: (equalization) This two-pin jumper is used to set receive equalization for the modem.When placed on both pins, no equalization is selected, and when placed on one pin,partial equalization is used. See the calibration/equalization section for details. Defaultis no equalization.J5: (DSUB-9 Ground/reset) This three-pin jumper connects pin 9 of the radio port toground or to the reset circuit. When placed on the center pin and pin 1, pin 9 of theDSUB-9 connector is connected to ground. When placed on the center pin and pin 2, |
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