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48 www.xilinx.com 7 Series DSP48E1 User GuideUG479 (v1.10) March 27, 2018Chapter 3: DSP48E1 Design ConsiderationsAdder Tree Versus Adder CascadeAdder TreeIn typical direct form FIR filters, an input stream of samples is presented to one input of themultipliers in the DSP48E1 slices. The coefficients supply the other input to the multipliers.An adder tree is used to combine the outputs from many multipliers as shown inFigure 3-1.X-Ref Target - Figure 3-1Figure 3-1: Traditional FIR Filter Adder Tree4848y(n-6)1818 4848×++181818181818h0(n)X(n)h1(n)484818184848×+×1818×18181818h2(n)X(n)h3(n)h4(n)X(n-2)X(n-4)h5(n)h6(n)h7(n)++Z-2Z-2Z-2×××× +The final stages of the postaddition in logic are theperformance bottleneck thatconsume more power.UG479_c2_01_072210+Send Feedback