Xilinx 7 Series User Manual

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20 www.xilinx.com 7 Series DSP48E1 User GuideUG479 (v1.10) March 27, 2018Chapter 2: DSP48E1 Description and Specifics7K160T 600 6 1007K325T 840 6 1407K355T 1,440 12 1207K410T 1,540 11 1407K420T 1,680 12 160 (2)7K480T 1,920 12 1607V585T 1,260 7 1807V2000T 2,160 9 240 (3)7VX330T 1,120 8 1407VX415T 2,160 18 1207VX485T 2,800 20 1407VX550T 2,880 18 200 (2)7VX690T 3,600 18 2007VX980T 3,600 20 1807VX1140T 3,360 14 240 (3)7VH580T 1,680 14 120 (3)7VH870T 2,520 14 180 (3)Notes:1. The four center DSP columns contain GTP Quads that displace 20 DSP slices in those columns per GTP Quad.2. The total DSP slice count is limited by tools.3. There are 60 DSP slices per column in each SLR.Table 2-1: Number of DSP48E1 Slices in 7 Series Devices (Cont’d)Device Total DSP48E1 Slices perDeviceNumber of DSP48E1 Columnsper DeviceNumber of DSP48E1 Slicesper ColumnSend Feedback