TXZ+ FamilyTMPM4M Group(1)Clock Control and Operation Mode2022-06-24Rev. 1.115 / 64The formula and the example of a setting of a PLL multiplication valueThe details of the items of [CGPLL0SEL]0SET[23:0]> which set up a PLL multiplication value are shownbelow.Table 1.1 Details of [CGPLL0SEL] setupThe items of PLL0SET Function[23:17] Correctionvalue setupThe quotient of fOSC/450000 (integer). For detail refer to Table1.2.[16:14] fOSC setup000: 6 ≤ fOSC ≤ 7 (unit: MHz)001: 7 < fOSC ≤ 8010: 8 < fOSC ≤ 10011: 10 < fOSC ≤ 12100 to 111: Reserved[13:12] Dividing setup00: Reserved01: Dividing by 2 (×1/2)10: Dividing by 4 (×1/4)11: Dividing by 8 (×1/8)[11:8]Fraction partMultiplicationsetup0000: 0.00000001: 0.06250010: 0.12500011: 0.18750100: 0.25000101: 0.31250110: 0.37500111: 0.43751000: 0.50001001: 0.56251010: 0.62501011: 0.68751100: 0.75001101: 0.81251110: 0.87501111: 0.9375[7:0]Integer partMultiplicationsetup0x00: 00x01: 10x02: 2:0xFD: 2530xFE: 2540xFF: 255Note: A multiplication value is the total of (integer part) and (fraction part).fPLL is denoted by the following formulas.fPLL= fOSC × ([CGPLL0SEL] + [CGPLL0SEL])× ([CGPLL0SEL])Note1: The absolute value of frequency accuracy is not guaranteed.Note2: There is no Linearity in the frequency by the Fraction part Multiplication setup.Note3: fPLL ≤ (Maximum Operating Frequency)Table 1.2 PLL correction (example)fOSC(MHz) [23:17]>(a decimal, an integral value)6.00 148.00 1810.00 2312.00 27The PLL correction value can be calculated below.fOSC = 10.0 MHz, 10.0/0.45 = 22.22 23; A fraction part is rounded up. |
