Sony MEX-BT5100 Service Manual

Also see for BluetoothH MEX-BT5100: Installation/connections Operating instructions Installation/connections Quick guide Operating instructions

Contents

MEX-BT510049• IC Pin Function DescriptionSERVO BOARD IC2 TC94A70FG-002 (RF AMP, DIGITAL SERVO, DIGITAL SIGNAL PROCESSOR)Pin No. Pin Name I/O Description1 AVSS3 - Ground terminal2 RFZI I RF ripple zero crossing signal input terminal3 RFRP O RF ripple signal output terminal4 SBAD/RFDC/ETE O Subbeam addition signal output/RF peak detecting phase signal output for hologram selec-tion terminal Not used5 FEI I Focus error signal input terminal Not used6 TEI I Tracking error signal input terminal7 TEZI I Tracking error signal zero crossing input terminal8 AVDD3 - Power supply terminal (+3.3 V)9 FOO O Focus servo equalizer signal output terminal10 TRO O Tracking servo equalizer signal output terminal11 VREF I Reference voltage (+1.65V) input terminal12 FMO O Feeding servo equalizer signal output terminal13 DMO O Disc servo equalizer signal output terminal14 VSSP3 - Ground terminal15 VCOI I DSP VCO control voltage input terminal16 VDDP3 - Power supply terminal (+3.3 V)17 VDD1-1 - Power supply terminal (+1.5 V)18 VSS1-1 - Ground terminal19 FGIN I FG signal input terminal for CAV Not used20, 21 IOO (/HSO),IOI (/UHSO) - Not used22 XVSS3 - Ground terminal23 XI I System clock input terminal (16.9344 MHz)24 XO O System clock output terminal (16.9344 MHz)25 XVDD3 - Power supply terminal (+3.3 V)26 DVSS3-1 - Ground terminal27 RO O R channel data (positive) output terminal28 DVDD3 - Power supply terminal (+3.3 V)29 DVR I Reference voltage (+1.65V) input terminal30 LO O L channel data (positive) output terminal31 DVSS3-2 - Ground terminal32 VDDT3-1 - Power supply terminal (+3.3 V)33 VSS1-2 - Ground terminal34 VDD1-2 - Power supply terminal (+1.5 V)35 VDDM1 - Power supply terminal (+1.5 V)36 MSTBY I S-RAM standby mode control signal input from the CD system control37 /RST I Reset signal input from the CD system control38 to 41 BUS0 to BUS3 I/O Bus data input/output with the CD system control42 BUCK (CLK) I Bus clock signal input from the CD system control43 /CCE I Chip enable signal input from the CD system control44 TEST I Setting terminal for test mode Normally fixed at "L"45 IRQ I Interrupt request signal input terminal Not used46, 47 AOUT3 (PO4),AOUT2 (PO5) - Not used48 PIO0 O Request signal output to the CD system control49, 50 PIO1, PIO2 - Not used51 PIO3 I Muting on/off control signal input from the CD system control "L": mute52 VSS1-3 - Ground terminal53 VDDT3-2 - Power supply terminal (+3.3 V)54 SBSY - Not used55 SBOK/FOK - Not used56 IPF - Not used57 SFSY/LOCK - Not used58 ZDET O Zero detection signal output to the CD system control