17 16-BIT PWM TIMERS (T16B)S1C31D50/D51 TECHNICAL MANUAL Seiko Epson Corporation 17-5(Rev. 2.00)6. Configure the DMA controller and set the following T16B control bits when using DMA transfer:- Write 1 to the DMA transfer request enable bits in theT16B_nMZDMAEN and T16B_nCCmDMAEN registers. (Enable DMA transfer requests)7. Set the following T16B_nCTL register bits:- T16B_nCTL.CNTMD[1:0] bits (Select count up/down operation)- T16B_nCTL.ONEST bit (Select one-shot/repeat operation)- Set the T16B_nCTL.PRESET bit to 1. (Reset counter)- Set the T16B_nCTL.RUN bit to 1. (Start counting)17.4.2 Counter Block OperationsThe counter in each counter block channel is a 16-bit up/down counter that counts the selected operating clock (countclock).Count modeThe T16B_nCTL.CNTMD[1:0] bits allow selection of up, down, and up/down mode. The T16B_nCTL.ON-EST bit allows selection of repeat and one-shot mode. The counter operates in six counter modes specified witha combination of these modes.Repeat mode enables the counter to continue counting until stopped via software. Select this mode to generateperiodic interrupts at desired intervals or to generate timer output waveforms.One-shot mode enables the counter to stop automatically. Select this mode to stop the counter after an interrupthas occurred once, such as for measuring pulse width or external event intervals and checking a specific lapseof time.Up, down, and up/down mode configures the counter as an up counter, down counter and up/down counter, re-spectively.MAX counter data registerThe MAX counter data register (T16B_nMC.MC[15:0] bits) is used to set the maximum value of the counter(hereafter referred to as MAX value). This setting limits the count range to 0x0000–MAX value and determinesthe count and interrupt cycles. When the counter is set to repeat mode, the MAX value can be rewritten in theprocedure shown below even if the counter is running.1. Check to see if the T16B_nCTL.MAXBSY bit is set to 0.2. Write the MAX value to the T16B_nMC.MC[15:0] bits.Note: When rewriting the MAX value, the new MAX value should be written after the counter has beenreset to the previously set MAX value.Counter resetSetting the T16B_nCTL.PRESET bit to 1 resets the counter. This clears the counter to 0x0000 in up or up/downmode, or presets the MAX value to the counter in down mode.The counter is also cleared to 0x0000 when the counter value exceeds the MAX value during count up operation.Counting startTo start counting, set the T16B_nCTL.RUN bit to 1. The counting stop control depends on the count mode set.Counter value readThe counter value can be read out from the T16B_nTC.TC[15:0] bits. However, since T16B operates on CLK_T16Bn, one of the operations shown below is required to read correctly by the CPU.- Read the counter value twice or more and check to see if the same value is read.- Stop the timer and then read the counter value.