Epson S1C31D50 Technical Manual

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11 SUPPLY VOLTAGE DETECTOR (SVD3)11-8 Seiko Epson Corporation S1C31D50/D51 TECHNICAL MANUAL(Rev. 2.00)Bit 0 SVDIFThis bit indicates the low power supply voltage detection interrupt cause occurrence status.1 (R): Cause of interrupt occurred0 (R): No cause of interrupt occurred1 (W): Clear flag0 (W): IneffectiveNote: The SVD3 internal circuit is initialized if the interrupt flag is cleared while SVD3 is in operationafter 1 is written to the SVD3CTL.MODEN bit.SVD3 Interrupt Enable RegisterRegister name Bit Bit name Initial Reset R/W RemarksSVD3INTE 15–8 – 0x00 – R –7–1 – 0x00 – R0 SVDIE 0 H0 R/WBits 15–1 ReservedBit 0 SVDIEThis bit enables low power supply voltage detection interrupts.1 (R/W): Enable interrupts0 (R/W): Disable interruptsNotes: • If the SVD3CTL.SVDRE[3:0] bits are set to 0xa, no low power supply voltage detectioninterrupt will occur, as a reset is issued at the same timing as an interrupt.• To prevent generating unnecessary interrupts, the corresponding interrupt flag should becleared before enabling interrupts.