11: Test Support11-6 EPSON ARM720T CORE CPU MANUALThe CAM match, RAM read format for data is shown in Figure 11-9.Figure 11-9 Data format, CAM match RAM read11.4.1 Addressing the CAM and RAMFor the CAM read or write, and RAM read or write operations you must specify the segment,index, and word (for the RAM operations). The CAM and RAM operations use the value in thevictim pointer for that segment, so you must ensure that the value is written in the victimpointer before any CAM or RAM operation.If the MCR write victim and lockdown base is used, then the victim pointer is incrementedafter every CAM read or write, and every RAM read or write. If the MCR write victim is used,then the victim pointer is only incremented after every CAM read or write. This enablesefficient reading or writing of the CAM and RAM for an entire segment. The write cache victimand lockdown operations are shown in Table 11-4.The write cache victim and lockdown base format for Rd is shown in Figure 11-10.Figure 11-10 Rd format, write cache victim and lockdown baseThe write cache victim format for Rd is shown in Figure 11-11.Figure 11-11 Rd format, write cache victimAnother cache test register, C15.C, is written with the current victim of the addressed segmentwhenever an MCR CAM read is executed. This is intended for use in debug to establish thevalue of the current victim pointer of each segment before reading the values of the CAM andRAM, so that the value can be restored afterwards.Table 11-4 Write cache victim and lockdown operationsOperation InstructionsWrite cache victim and lockdown base MCR p15, 0, , c9, c0, 0MCR p15, 0, , c9, c0, 1Write cache victim MCR p15, 0, , c9, c1, 0MCR p15, 0, , c9, c1, 1HitRAM data word [29:0]31 2930Miss031 0SBZIndex2526Seg31 7 6 5 4 0SBZ SBZIndex26 25
