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Xilinx SP605 User Manual

Also see for SP605: Hardware TutorialHardware setup guideHardware user's guide

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Contents
  1. revision history
  2. Table Of Contents
  3. Table Of Contents
  4. Guide Contents
  5. Additional Support Resources
  6. Overview
  7. Features
  8. Block Diagram
  9. Related Xilinx Documents
  10. Spartan-6 XC6SLX45T-3FGG484 FPGA
  11. I/O Voltage Rails
  12. SPI x4 Flash
  13. Linear BPI Flash
  14. FPGA Design Considerations for the Configuration Flash
  15. USB JTAG
  16. Clock Generation
  17. Oscillator Socket (Single-Ended, 2.5V or 3.3V)
  18. SMA Connectors (Differential)
  19. PCI Express Endpoint Connectivity
  20. SFP Module Connector
  21. Tri-Speed Ethernet PHY
  22. USB-to-UART Bridge
  23. DVI CODEC
  24. Kb NV Memory
  25. Status LEDs
  26. Ethernet PHY Status LEDs
  27. FPGA INIT and DONE LEDs
  28. User I/O
  29. User Pushbutton Switches
  30. User DIP Switch
  31. User SIP Header
  32. User SMA GPIO
  33. Switches
  34. FPGA_PROG_B Pushbutton SW3 (Active-Low)
  35. System ACE CF CompactFlash Image Select DIP Switch S1 (Active-High)
  36. Mode DIP Switch SW1 (Active-High)
  37. VITA 57.1 FMC LPC Connector
  38. Power Management
  39. Onboard Power Regulation
  40. Configuration Options
  41. for more information
Xilinx SP605 User Manual Manual pdf 45 page image
SP605 Hardware User Guide www.xilinx.com 45UG526 (v1.1.1) February 1, 2010Detailed DescriptionUser SMA GPIOThe SP605 includes an pair of SMA connectors for GPIO as described in Figure 1-19 andTable 1-27.X-Ref Target - Figure 1-19Figure 1-19: User SMA GPIOTable 1-27: User SMA ConnectionsU1 FPGA Pin Schematic Net Name GPIO SMA PinA3 USER_SMA_GPIO_N J39.1B3 USER_SMA_GPIO_P J40.1GND1GND2GND3GND4GND5GND6GND7SIGGND1GND2GND3GND4GND5GND6GND7SIGUSER_SMA_GPIO_PUSER_SMA_GPIO_N18765432J4032K10K-400E31876543232K10K-400E3J39UG526_19 _092409
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This manual is suitable for:
SP605Spartan-6 FPGA Series
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