Sony Glasstron Lite PLM-A35E Service Manual

Also see for Glasstron PLM-A35E: Operating instructions Operating instructions

4-43 PLM-A35E (AEP)Confidential• RG-A01 BOARD IC801 CXA3017R-T6 (LCD RGB DECODER, LCD DRIVE, LCD TIMING GENERATOR)Pin No. Pin Name I/O Description1 EXT R I External digital R signal input terminal Not used (fixed at “L”)2 EXT G I External digital G signal input terminal Not used (fixed at “L”)3 EXT B I External digital B signal input terminal Not used (fixed at “L”)4 TRAP O External trap connection terminal Not used (open)5 VDD1 — Power supply terminal (+3V) (digital system)6 LOAD I Chip select signal input from the system controller (IC301)7 DATA I Serial data input from the system controller (IC301)8 SCLK I Serial data transfer clock signal input from the system controller (IC301)9 RPD O Phase comparator output terminal10 TEST1 I Input terminal for the test Not used (fixed at “L”)11 BLK O Blanking pulse signal output terminal Not used (open)12 CLR O Clear pulse signal output to the left and right LCD units13 HST2 O Horizontal start pulse 2 signal output to the left and right LCD units14 HST1 O Horizontal start pulse 1 signal output terminal Not used (open)15 XHST1 O Horizontal start pulse 1 signal output terminal (reverse polarity of the HST1 qf pin)Not used (open)16 VSS — Ground terminal (digital system)17 HCK2 O Horizontal clock pulse 2 signal output to the left and right LCD units18 HCK1 O Horizontal clock pulse 1 signal output to the left and right LCD units19 XPCG O Pre charge pulse signal output terminal (reverse polarity of the PCG w; pin) Not used (open)20 PCG O Pre charge pulse signal output terminal Not used (open)21 HD O Horizontal drive pulse signal output terminal22 XVST O Vertical start pulse signal output to the left LCD unit (reverse polarity of the VST wd pin)23 VST O Vertical start pulse signal output to the right LCD unit24 VCK4 O Vertical clock pulse 4 signal output to the left and right LCD units25 VCK3 O Vertical clock pulse 3 signal output terminal Not used (open)26 VCK2 O Vertical clock pulse 2 signal output terminal Not used (open)27 VCK1 O Vertical clock pulse 1 signal output terminal Not used (open)28 XEN1 O Enable pulse 1 signal output terminal (reverse polarity of the EN1 wl pin) Not used (open)29 EN1 O Enable pulse 1 signal output terminal Not used (open)30 EN2 O Enable pulse 2 signal output to the left and right LCD units31 VD O Vertical drive pulse signal output terminal Not used (open)32 DA OUT O DAC signal output terminal Not used (open)33 VDD2 — Power supply terminal (+3V) (digital system)34 DWN O Up/down scan inversion switching signal output terminal (open collector output)Not used (open)35 RGT1 O Left/right scan inversion switching signal output terminal (open collector output)Not used (open)36 FB PSIG I Capacitor connection terminal for DC voltage feedback circuit of PSIG signal (pin ek)Not used (open)37 GND3 — Ground terminal (analog system) for PSIG38 PSIG O PSIG signal output terminal Not used (open)39 VCC3 — Power supply terminal (+12V) (analog system) for PSIG Not used40 B OUT O B signal (primary color signal) output to the left and right LCD units41 FB B I Capacitor connection terminal for DC voltage feedback circuit of B signal (pin r;)42 GND2 — Ground terminal (analog system)