2 Operation• When "td" (= 30msec) passes after the voltage reaches 4.25V byturning on the power, the output is drive to HIGH."td" is set by the external capacitor (C106).Block diagram(11) Operation panel1 General• The operation circuit is composed of the key matrix circuit and thedisplay matrix circuit.Key detection: With the signal detected by Q1 ∼ Q7 and KI0 ∼ KI3signal matrix at LOW (GND) and Q2 ∼ Q7 at HIGH (open), thelevel of KI 0 ∼ KI3 is checked to judge whether key matrix 1, 2, and3 are HIGH or LOW, judging on/off.For Q2 ∼ Q7, switching is made every 2msec to judge each ofthem.R1R21.25V+--Power5μAreferenceGND Delay capacityOutputtta taHLOutput not constantta = 30m sect4.25V0.65VPower voltageOutput stateKI0KI1KI2321Q4M66313+5V2 +5V1CPU TD6250412 – 12