Samsung iDCS500 Manual

Also see for iDCS500: Programming manual General description User guide User guide User guide

Contents

1-5TECHNOLOGYMemoryThe system operates using stored program control. This program is stored on a SmartMedia cardinserted into the Main Control Processor card (MCP) and contains a minimum of eight Megabytes ofNAND-Flash memory. Optional, larger capacity, SmartMedia cards are also available to provide abackup customer database and a backup operating program. The system boots from a 256 Kbyteboot ROM and downloads the operating program into four megabytes of DRAM on the Main ControlProcessor (MCP) card. The four megabytes of DRAM are increased to 8 megabytes with the additionof the Inter Processor communications Module (IPM) in an expanded system. The customerdatabase is stored in 1.0 Mbytes of non-volatile SRAM for a single cabinet system. This expands to2.5 Mbytes with the IPM installed and to 3.0 Mbytes with the addition of the optional LAN interfacemodule (LAN).MicroprocessorsThe iDCS 500 uses distributed processing. Its primary processor is a 16 bit (32 bit core) MotorolaMC68302 operating at a clock speed of 25 MHz on the MCP card. This provides all the processingnecessary for a single cabinet system. In a multi cabinet system the secondary level of processing ison the SCP card for the first cabinet and on the LCP cards for the expansion cabinets. Thesesecondary processors are MC68302 processors running at 16 MHz and provide local control of eachcabinet. Messaging between the primary and secondary processors is handled by a MC68302processor running at 25 MHz located on the Inter Processor communications Module (IPM) PCB.The tertiary level of processing is done in the keysets. The digital keysets use a Hitachi H8 processorfor data communication within the system.