Samsung KS57C2308 Manual

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KS57C2308/P2308/C2316/P2316 SERIAL I/O INTERFACE13-3SERIAL I/O MODE REGISTER (SMOD)The serial I/O mode register, SMOD, is an 8-bit register that specifies the operation mode of the serial interface.Its reset value is logical zero. SMOD is organized in two 4-bit registers, as follows:FE0H SMOD.3 SMOD.2 SMOD.1 SMOD.0FE1H SMOD.7 SMOD.6 SMOD.5 0SMOD register settings enable you to select either MSB-first or LSB-first serial transmission, and to operate intransmit-and-receive mode or receive-only mode. SMOD is a write-only register and can be addressed only by8-bit RAM control instructions. One exception to this is SMOD.3, which can be written by a 1-bit RAM controlinstruction. When SMOD.3 is set to 1, the contents of the serial interface interrupt request flag, IRQS, and the3-bit serial clock counter are cleared, and SIO operations are initiated. When the SIO transmission starts,SMOD.3 is cleared to logical zero.Table 13-1. SIO Mode Register (SMOD) OrganizationSMOD.0 0 Most significant bit (MSB) is transmitted first1 Least significant bit (LSB) is transmitted firstSMOD.1 0 Receive-only mode; output buffer is off1 Transmit-and-receive mode; output buffer is onSMOD.2 0 Disable the data shifter and clock counter; retain contents of IRQS flag when serialtransmission is halted1 Enable the data shifter and clock counter; set IRQS flag to "1" when serialtransmission is completedSMOD.3 1 Clear IRQS flag and 3-bit clock counter to "0"; initiate transmission and then resetthis bit to logic zeroSMOD.4 0 Bit not used; value is always "0"SMOD.7 SMOD.6 SMOD.5 Clock Selection R/W Status of SBUF0 0 0 External clock at SCK pin SBUF is enabled when SIOoperation is halted or when SCKgoes high.0 0 1 Use TOL0 clock from TC00 1 – CPU clock: fxx/4, fxx/8, fxx/64 Enable SBUF read/write1 0 0 4.09 kHz clock: fxx/210 SBUF is enabled when SIOoperation is halted or when SCKgoes high.1 1 1 262 kHz clock: fxx/24NOTES:1. “fxx” = system clock.2. kHz frequency ratings assume a system clock (fxx) running at 4.19 MHz.3. The SIO clock selector circuit cannot select a fxx/24 clock if the CPU clock is fxx/64.