I/O PORTS KS57C2308/P2308/C2316/P231610-4++ PROGRAMMING TIP — Enabling and Disabling I/O Port Pull-Up ResistorsP2 and P3 are enabled to be pull-up resistors.BITS EMBSMB 15LD EA,#0CHLD PUMOD,EA ; enable the pull-up resistors of P2 and P3N-CHANNEL OPEN-DRAIN MODE REGISTER (PNE)The n-channel open-drain mode register (PNE) is used to configure ports 4 and 5 to n-channel open-drain or aspush-pull outputs. When a bit in the PNE register is set to "1", the corresponding output pin is configured ton-channel, open-drain; when set to "0", the output pin is configured to push-pull. The PNE register consists of an8-bit register, PNE can be addressed by 8-bit write instructions only.FD6H PNE4.3 PNE4.2 PNE4.1 PNE4.0FD7H PNE5.3 PNE5.2 PNE5.1 PNE5.0PIN ADDRESSING FOR OUTPUT PORT 8The addresses for the port 8 1-bit output pin buffers are located in bank 1 of data memory instead of bank 15. Toaddress port 8 output pins, use the settings EMB = 1 and SMB = 1. The LCD mode register, LMOD is used tocontrol whether the pin address is used for LCD data output or for normal data output:Table 10-5. LMOD.7 and LMOD.6 Setting for Port 8 Output ControlLMOD.7 LMOD.6 LCD Output Segments 1-Bit Output Pins0 0 Seg 24–31 –0 1 Seg 24–27 P8.4–P8.7 (Seg 28–31)1 0 Seg 28–31 P8.0–P8.3 (Seg 24–27)1 1 – P8.0–P8.7 (Seg 24–31)Each address in RAM bank 1 corresponds to a 4-bit register location. The LSB (bit 0) of the register location isused as the port buffer for either LCD segment output or normal 1-bit data output. Locations that are unused forLCD or port I/O can be used as normal data memory. After a RESET, the values contained in the port 8 outputbuffer are left undetermined.Table 10-6 shows port 8 pin addresses and also the corresponding LCD segment names if the pins are used tooutput LCD segment data. Pin addresses that are not used for LCD segment output can be used for normal 1-bitoutput.