Panasonic TH-50PM50U Service Manual

Also see for TH-50PM50U: Operating instructions

Contents

Panasonic TH-50PM50U Service Manual Manual pdf 86 page image

13.24. D-Board Block DiagramCLKD0CLKD1TXD_PCRXD_PCSDA2SCL2SDA1IIC_CONTSCL1LED_GLED_RREMOCONLED_GLED_RREMSOS7PANEL_MAIN_ONPS_SOSPS_SOSPANEL_MAIN_ONALARMREADYREADYALARMFAN_CONTFAN_SOSECO_ONF_STBY_ONFAN_CONTFAN_SOSECO_ONF_STBY_ONCLKM_INFREE_RUNIIC_INTDRVMUTENCEDCLKNCSDATA0CONF_DONEDCLKNCEASDI0NCONFIGCONF_DONENCONFIGDATA0NCSASDI0TXD_PCRXD_PCIIC_CONTIIC_INTSDA2SCL2SDA1SCL1SOS2SOS9SOS2SOS9CLKU0CLKU2CLKU3CLKD3CLKD2CLKU1X9200R9028R 10bitScan Control DATA 13bitIIC/INTG 10bitB 10bitIIC_CONTSCL2B 10bitSDA1R 10bitSDA2SCL1Sustain Control DATA 6bitG 10bit46IC9502827PROCESSORDATADRIVER7TO C54TO C55116851284D46710 TXD166RXD1IIC_CONT30IIC_INTLVDS DISCHARGECONTROLSTB_SDA121LEVEL CONVERTERSTB_SCL222 2865Voltage26STB_SDA27849IC950050FPGA/SYNC/OSD/DISCHARGE CONTROL555NRSTXRSTNEW PLASMA AI SUB-FIELDPLASMA AI/SUB FIELD PROCESSORIC9003IC9303MICOM XINXOUTX9000539.216MHzIC9005,0652RESETIC9004RESET28RESETSTB3.3V295STB_SCL1Video DATA 66bit(UA,UB,UCO-15)3.3V 5VLow3.3V 5VVideo DATA 66bit(DA,DB,DC0-15)D33D3410DATA RL-DOWNDATA LR-DOWNDATA R TIMINGDATA L TIMING5V_DET5657TO DG3 D3DRV_SOS2DRV_SOS9999792DRV_SOS772 READYALARM711AVRAVR STB3.3V2DRVMUTESTB5V_MSTB3.3V4IC9008IIC_DATA1IIC_CLK1 19TUNER_SUB_ON6ALARMFAN_SOS8FAN_CONT(FAN_MAX)73DISPEN4READYPANEL_STB_ON1141120ECO_ON42RXDTXD6D50+LVDSCLKE+LVDSCLKE-LVDS214TO DG518E-LVDS3E+LVDS0167151112E-LVDS1104E-LVDS410-LVDSCLK9E-LVDS0 2E-LVDSCLKE+LVDS2E+LVDS117E+LVDS45E+LVDS3LVDS_DETSTBY5V+5VD25PS_SOS9PANEL_MAIN_ONECO_ON1+5V 7FAN_SOS213+12V15+12VFAN_CONT141716310TO P25F_STBY_ONnCS15178nCE 6DATA0 7CONF_DONEPDB01nCONFIGPSTB5ASDIO311PSLCTPBUSY9D6DCLK1319XRSTPDB11816DCDC_ONst-rIC9300CONVERTERXRSTCTI/TINTWB-ADJI/P COLORFORMAT CONVERTER/RGB PROCESSORCONVERTER CONTRASTFORMATDifferentialSignalingRECEIVERFPGA CONTROLOSDR,G,B,HD,VD,CK1419PS_SOS98PANEL_MAIN_ON48P_ON/OFF41Q9003Q9012Q9013Q9008Q9009P3V_SCL2P3V_SDA269LED_RREM_IN7010LED_GTO SC20D20291320SCANDATA111DRV_SOS7P5V36D82LED_RREMOCONLED_GQ901035553431DATA DRIVE5V_DET65685864POWERFEED BACKDATA56 DRVRST57DRVRST_DATASUSTAINDATA576414DRV_SOS9DRV_SOS2Q9011R0 B0 VD HD DCKG9R9 B9PICTURE OUTPUTDCKG0P3V_SCL1P3V_SDA1P3V_SDA2P3V_SCL2Q9000P12VP5VSTB5V_MIC900165EEPROMSDASCLQ9704Q9703151RUN/SS126SW123BG227TG224VIN17BG219SW216TG2RUN/SS2G2 S2 G1 S1D2 D13.3VQ9702 Q9701P12V1.5VDC_DC CONV.IC9702D2G1S2 S1G2D12 1 4IC9700AVR 2.5V3.3V 2.5VNRSTDRV_RSTDATA POWERFEEDBACKDATA DRIVER32M FLASH MEMORYRESET 4 5VOUT VCCIC9301RESET 3.3VSS PULSESCAN OUTSC PULSE3.3V 5VIC95043.3V 5VIC95034851UMH,UML,USH,USL,UEH,NUEL,ODED,ODEUCL,CLK,SIU,SID,SCSU,CEL2,CPH,CEL,CBK,CSL,CSH,CML,CMHIC9302DDR SDRAM(64M)DSHL,DSLL,DMHL,DMLL,DMHRCLRU,LEU,PCU1,PCU2Q9700 Q99016 DRVRSTQ9900VD HDCLK410CLK8CLK111714 CLK5X1 120X2IC9200PCK OCKDPCLK5 DPCLK2DON/OFFSWQ9004 Q9001 OSDP3V_SCL1P3V_SDA1P5VFPDATA0FPDATA1FPCLKSCL SDAP3V_SCL2P3V_SDA2CONTROL3.3V3.3V 1443.3V1DATA 62 IC90075NCSDCLKADSICONF_DONEDATA0NCSNCEASDI0NCONFIGDCLKTO K31 STB5VSTB5V_M(PCD1)(PCD2)P5VSDASCLControl DATA943.3V_DETP12V_DET9395P5V_DETQ9023 Q9022Q9021 Q9020P5VP12V3.3VDATA DRIVEVCC CTL OUTNOT USEDSTB 5VSTB 5V 12PROM (FPGA)LEVEL CONVERTERLEVEL CONVERTERLEVEL CONVERTERCLOCK GENE.DIGITAL SIGNAL PROCESSORPlASMA AIFORMAT CONVERTER,SUB-FIELD PROCESSORFORFACTORYUSEFORFACTORYUSED3251126571041555240146D318273652293031345R-UPDATA R(DATA R TIMING)CLK1CLK0DATA DRIVE5V DETP5VDRV-RSTDATA LL-UPCLK2CLK3DATA DRIVE5V DETP5VDRV-RST(DATA L TIMING)TO C25TO C24Q9801Q9800(PCU1)(PCU2)P5VP5VP5VP5VDRVCLKD0-D3DRVCLKU0-U336bit(DA,DB,DC10-21)(UA,UB,33bit33bit(UA,UB,UC0-7,16-18)UC8-15,(DA,DB,DC0-9)30bit5V(P)P5VCLRD,LED,PCD1,PCD2ODED,ODEU19-21)TH-50PM50UD-Board Block DiagramTH-50PM50UD-Board Block DiagramTH-50PM50U86