Technical Information 1-19Table Section 1-8 Versa P Series Interrupt Level AssignmentsControllerMaster/Slave Priority Name DeviceSlave 9 IRQ14 Hard Disk Controller 1Slave 10 IRQ15 Reserved (2nd HDD IDE on D/S)Master 11 IRQ03 ReservedMaster 12 IRQ04 Serial Port 1Master 13 IRQ05 Reserved (Sound)Master 14 IRQ06 Diskette Drive Controller*Master 15 IRQ07 Parallel Port 1**Industry standard locationsPOWER MANAGEMENT OVERVIEWThe Versa P system uses power management features to prolong system battery life.The CPU implements a System Management Interrupt (SMI) function that works transpar-ently with the operating system and application software. When activated, the processormode changes to real mode. Unique “SM-RAM” containing power management software ismapped at address 30000h-3FFFFh. This activity is inherent to the system and does not re-quire any adjustment to the operating system or application software.The power management program is located in ROM at location EA000h-0EFFFh. In on-board DRAM, the software is physically allocated at 0D0000h-0DFFFFh.Use Auto Setup to select specific power management options. For information on how toselect these options, see Section 2.NOTE: Power management features are un-available under Docking Station II operation.System Power ManagementThe system power management consists of the following operation modes. These modesare:n Active Mode In active mode, the system uses maximum power. It operateswith the default clock speed (75 MHz). The system continues to run at this speedsunless overwritten by the power management features.
